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EIT
2009
IEEE
15 years 11 months ago
System-level memory modeling for bus-based memory architecture exploration
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...
Zhongbo Cao, Ramon Mercado, Diane T. Rover
136
Voted
GLVLSI
2006
IEEE
105views VLSI» more  GLVLSI 2006»
15 years 11 months ago
A practical approach for monitoring analog circuits
Formal methods have been advocated for the verification of digital design where correctness is proved mathematically. In contrast to digital designs, the verification of analog ...
Mohamed H. Zaki, Sofiène Tahar, Guy Bois
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
15 years 10 months ago
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Dongku Kang, Yiran Chen, Kaushik Roy
CODES
2009
IEEE
15 years 8 months ago
An MDP-based application oriented optimal policy for wireless sensor networks
Technological advancements due to Moore’s law have led to the proliferation of complex wireless sensor network (WSN) domains. One commonality across all WSN domains is the need ...
Arslan Munir, Ann Gordon-Ross
CEEMAS
2005
Springer
15 years 10 months ago
MAS Meta-models on Test: UML vs. OPM in the SODA Case Study
In the AOSE (Agent-Oriented Software Engineering) area, several research efforts are underway to develop appropriate meta-models for agent-oriented methodologies. Meta-models are ...
Ambra Molesini, Enrico Denti, Andrea Omicini