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FPL
2007
Springer
190views Hardware» more  FPL 2007»
15 years 11 months ago
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems
Today’s heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of thes...
Andreas Herrholz, Frank Oppenheimer, Philipp A. Ha...
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
15 years 11 months ago
Heterogeneous behavioral hierarchy for system level designs
Enhancing productivity for designing complex embedded systems requires system level design methodology and language support for capturing complex design in high level models. For ...
Hiren D. Patel, Sandeep K. Shukla, Reinaldo A. Ber...
DAC
2004
ACM
15 years 10 months ago
Correct-by-construction layout-centric retargeting of large analog designs
Aggressive design cycles in the semiconductor industry demand a design-reuse principle for analog circuits. The strong impact of layout intricacies on analog circuit performance n...
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, Roy ...
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SBCCI
2003
ACM
136views VLSI» more  SBCCI 2003»
15 years 10 months ago
SystemC and the Future of Design Languages: Opportunities for Users and Research
There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
Grant Martin
DAC
2008
ACM
16 years 6 months ago
Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array fo
: Spin-Torque Transfer Magnetic RAM (STT MRAM) is a promising candidate for future universal memory. It combines the desirable attributes of current memory technologies such as SRA...
Jing Li, Charles Augustine, Sayeef S. Salahuddin, ...