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WWIC
2004
Springer
133views Communications» more  WWIC 2004»
15 years 9 months ago
Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology
Abstract. This paper presents a new perspective to the design of wireless networks using the proposed dynamic data type refinement methodology. In the forthcoming years, new portab...
Stylianos Mamagkakis, Alexandros Mpartzas, Georgio...
ISCAS
2007
IEEE
106views Hardware» more  ISCAS 2007»
15 years 10 months ago
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 9 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
ICCD
2004
IEEE
135views Hardware» more  ICCD 2004»
16 years 28 days ago
Design Methodologies and Architecture Solutions for High-Performance Interconnects
In Deep Sub-Micron (DSM) technologies, interconnects play a crucial role in the correct functionality and largely impact the performance of complex System-on-Chip (SoC) designs. F...
Davide Pandini, Cristiano Forzan, Livio Baldi
DAC
2003
ACM
15 years 9 months ago
Low-power design methodology for an on-chip bus with adaptive bandwidth capability
This paper describes a low-power design methodology for a bus architecture based on hybrid current/voltage mode signaling for deep sub-micrometer on-chip interconnects that achiev...
Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III