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CODES
2008
IEEE
14 years 9 months ago
Methodology for multi-granularity embedded processor power model generation for an ESL design flow
With power becoming a major constraint for multi-processor embedded systems, it is becoming important for designers to characterize and model processor power dissipation. It is cr...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
108
Voted
DAC
1997
ACM
15 years 1 months ago
Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
Howard H. Chen, David D. Ling
103
Voted
FPL
2004
Springer
144views Hardware» more  FPL 2004»
15 years 1 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna
81
Voted
CCR
2004
62views more  CCR 2004»
14 years 9 months ago
Methodological frameworks for large-scale network analysis and design
This paper emphasizes the need for methodological frameworks for analysis and design of large scale networks which are independent of specific design innovations and their advocac...
Antonis Papachristodoulou, Lun Li, John C. Doyle
72
Voted
FPGA
1998
ACM
140views FPGA» more  FPGA 1998»
15 years 1 months ago
More Wires and Fewer LUTs: A Design Methodology for FPGAs
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
Atsushi Takahara, Toshiaki Miyazaki, Takahiro Muro...