9 search results - page 2 / 2 » Quadruple Time Redundancy Adders |
TC
1998
13 years 5 months ago
1998
—This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
INTEGRATION
2008
13 years 6 months ago
2008
Abstract: Hybrid-redundant number representation has provided a flexible framework for digitparallel addition in a manner that facilitates area-time tradeoffs for VLSI implementati...
TC
2008
13 years 6 months ago
2008
Since redundant number systems allow for constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed,...
ARITH
2005
IEEE
13 years 12 months ago
2005
IEEE
We present a radix-2 online computational scheme for evaluating multinomials in a fixed-point number representation system. Its main advantage is that it can adapt to any evaluat...