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DAC
2004
ACM
16 years 4 months ago
Virtual memory window for application-specific reconfigurable coprocessors
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
Miljan Vuletic, Laura Pozzi, Paolo Ienne
ESOP
2009
Springer
15 years 10 months ago
Amortised Memory Analysis Using the Depth of Data Structures
Hofmann and Jost have presented a heap space analysis [1] that finds linear space bounds for many functional programs. It uses an amortised analysis: assigning hypothetical amount...
Brian Campbell
99
Voted
FOCS
2009
IEEE
15 years 10 months ago
Choice-Memory Tradeoff in Allocations
In the classical balls-and-bins paradigm, where n balls are placed independently and uniformly in n bins, typically the number of bins with at least two balls in them is Θ(n) and ...
Noga Alon, Eyal Lubetzky, Ori Gurel-Gurevich
109
Voted
IEEEPACT
2008
IEEE
15 years 10 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
119
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DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
15 years 9 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...