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» Quantifiers and Working Memory
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102
Voted
ISCA
1998
IEEE
123views Hardware» more  ISCA 1998»
15 years 7 months ago
Weak Ordering - A New Definition
A memory model for a shared memory, multiprocessor commonly and often implicitly assumed by programmers is that of sequential consistency. This model guarantees that all memory ac...
Sarita V. Adve, Mark D. Hill
85
Voted
ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
15 years 7 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
125
Voted
ARC
2006
Springer
124views Hardware» more  ARC 2006»
15 years 7 months ago
A Flexible Multi-port Caching Scheme for Reconfigurable Platforms
Abstract. Memory accesses contribute sunstantially to aggregate system delays. It is critical for designers to ensure that the memory subsystem is designed efficiently, and much wo...
Su-Shin Ang, George A. Constantinides, Peter Y. K....
133
Voted
CF
2010
ACM
15 years 3 months ago
Efficient cache design for solid-state drives
Solid-State Drives (SSDs) are data storage devices that use solid-state memory to store persistent data. Flash memory is the de facto nonvolatile technology used in most SSDs. It ...
Miaoqing Huang, Olivier Serres, Vikram K. Narayana...
152
Voted
SAC
2008
ACM
15 years 3 months ago
A self-balancing striping scheme for NAND-flash storage systems
To use multiple memory banks in parallel is a nature approach to boost the performance of flash-memory storage systems. However, realistic data-access localities unevenly load eac...
Yu-Bin Chang, Li-Pin Chang