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» Quantifiers and Working Memory
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149
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ERSA
2010
199views Hardware» more  ERSA 2010»
15 years 1 months ago
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
Russell Tessier, Salma Mirza, J. Blair Perot
INFOCOM
2009
IEEE
15 years 10 months ago
TCP/IP Timing Channels: Theory to Implementation
—There has been significant recent interest in covert communication using timing channels. In network timing channels, information is leaked by controlling the time between tran...
Sarah H. Sellke, Chih-Chun Wang, Saurabh Bagchi, N...
96
Voted
INFOCOM
2008
IEEE
15 years 10 months ago
Cyber-Fraud is One Typo Away
Abstract— Spelling errors when typing a URL can be exploited by website-squatters: users are led to phony sites in a phenomenon we call parasitic URL naming. These phony sites im...
Anirban Banerjee, Dhiman Barman, Michalis Faloutso...
151
Voted
NDSS
2008
IEEE
15 years 10 months ago
Analyzing Privacy in Enterprise Packet Trace Anonymization
Accurate network measurement through trace collection is critical for advancing network design and for maintaining secure, reliable networks. Unfortunately, the release of network...
Bruno F. Ribeiro, Weifeng Chen, Gerome Miklau, Don...
ICDM
2005
IEEE
139views Data Mining» more  ICDM 2005»
15 years 9 months ago
Stability of Feature Selection Algorithms
With the proliferation of extremely high-dimensional data, feature selection algorithms have become indispensable components of the learning process. Strangely, despite extensive ...
Alexandros Kalousis, Julien Prados, Melanie Hilari...