2555 search results - page 134 / 511 » Quantifiers and Working Memory |
103
Voted
CORR
2010
Springer
15 years 28 days ago
2010
Springer
The work establishes fundamental limits between rate, reliability and computational complexity, for the general setting of outage-limited MIMO communications. In the high-SNR regim...
155
Voted
ISAAC
1999
Springer
15 years 7 months ago
1999
Springer
We consider online routing algorithms for routing between the vertices of embedded planar straight line graphs. Our results include (1) two deterministic memoryless routing algorit...
146
Voted
DCC
2008
IEEE
15 years 5 months ago
2008
IEEE
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
126
Voted
CHI
2011
ACM
14 years 7 months ago
2011
ACM
This paper presents the design, implementation, and evaluation of an interactive tabletop system that supports co-located meeting capture and asynchronous search and review of pas...
183
click to vote
TVLSI
2010
14 years 10 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...