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» Quantifiers and Working Memory
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SAC
2009
ACM
15 years 11 months ago
Impact of NVRAM write cache for file system metadata on I/O performance in embedded systems
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
In Hwan Doh, Hyo J. Lee, Young Je Moon, Eunsam Kim...
ICPP
2009
IEEE
15 years 10 months ago
Improving Resource Availability by Relaxing Network Allocation Constraints on Blue Gene/P
— High-end computing (HEC) systems have passed the petaflop barrier and continue to move toward the next frontier of exascale computing. As companies and research institutes con...
Narayan Desai, Darius Buntinas, Daniel Buettner, P...
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
15 years 10 months ago
Late-binding: enabling unordered load-store queues
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
Simha Sethumadhavan, Franziska Roesner, Joel S. Em...
CCECE
2006
IEEE
15 years 10 months ago
A Dynamic Associative E-Learning Model based on a Spreading Activation Network
Presenting information to an e-learning environment is a challenge, mostly, because ofthe hypertextlhypermedia nature and the richness ofthe context and information provides. This...
Phongchai Nilas, Nilamit Nilas, Somsak Mitatha
166
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ACMMSP
2006
ACM
260views Hardware» more  ACMMSP 2006»
15 years 10 months ago
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
Michael D. Adams, David S. Wise