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» Quantifiers and Working Memory
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VLSID
2007
IEEE
206views VLSI» more  VLSID 2007»
15 years 10 months ago
MAX: A Multi Objective Memory Architecture eXploration Framework for Embedded Systems-on-Chip
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
ISCA
2008
IEEE
116views Hardware» more  ISCA 2008»
15 years 4 months ago
3D-Stacked Memory Architectures for Multi-core Processors
Three-dimensional integration enables stacking memory directly on top of a microprocessor, thereby significantly reducing wire delay between the two. Previous studies have examin...
Gabriel H. Loh
EUROPAR
2009
Springer
15 years 4 months ago
Scheduling Recurrent Precedence-Constrained Task Graphs on a Symmetric Shared-Memory Multiprocessor
Abstract. We consider approaches that allow task migration for scheduling recurrent directed-acyclic-graph (DAG) tasks on symmetric, shared-memory multiprocessors (SMPs) in order t...
UmaMaheswari C. Devi
FPL
2000
Springer
143views Hardware» more  FPL 2000»
15 years 1 months ago
Memory Access Schemes for Configurable Processors
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
Holger Lange, Andreas Koch
ACL
1990
14 years 11 months ago
Memory Capacity and Sentence Processing
The limited capacity of working memory is intrinsic to human sentence processing, and therefore must be addressed by any theory of human sentence processing. This paper gives a th...
Edward Gibson