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DATE
2008
IEEE
112views Hardware» more  DATE 2008»
15 years 4 months ago
An novel Methodology for Reducing SoC Test Data Volume on FPGA-based Testers
Low-Cost test methodologies for Systems-on-Chip are increasingly popular. They dictate which features have to be included on-chip and which test procedures have to be adopted in o...
Paolo Bernardi, Matteo Sonza Reorda
HOTI
2008
IEEE
15 years 4 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
QEST
2008
IEEE
15 years 4 months ago
Characterization of the E-commerce Storage Subsystem Workload
This paper characterizes the workload seen at the storage subsystem of an e-commerce system. Measurements are conducted on multi-tiered systems running three different benchmarks,...
Xi Zhang, Alma Riska, Erik Riedel
RTSS
2008
IEEE
15 years 4 months ago
Predictable Interrupt Management and Scheduling in the Composite Component-Based System
This paper presents the design of user-level scheduling hierarchies in the Composite component-based system. The motivation for this is centered around the design of a system that...
Gabriel Parmer, Richard West
CGO
2007
IEEE
15 years 4 months ago
Run-Time Support for Optimizations Based on Escape Analysis
The JavaTM programming language does not allow the programmer to influence memory management. An object is usually allocated on the heap and deallocated by the garbage collector ...
Thomas Kotzmann, Hanspeter Mössenböck