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» Quantifiers and Working Memory
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STOC
2005
ACM
164views Algorithms» more  STOC 2005»
15 years 10 months ago
Cooperative asynchronous update of shared memory
The Write-All problem for an asynchronous shared-memory system has the objective for the processes to update the contents of a set of shared registers, while minimizing the mber o...
Bogdan S. Chlebus, Dariusz R. Kowalski
MICRO
2009
IEEE
159views Hardware» more  MICRO 2009»
15 years 4 months ago
Adaptive line placement with the set balancing cache
Efficient memory hierarchy design is critical due to the increasing gap between the speed of the processors and the memory. One of the sources of inefficiency in current caches is...
Dyer Rolán, Basilio B. Fraguela, Ramon Doal...
CGO
2005
IEEE
15 years 3 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
CISIS
2009
IEEE
15 years 4 months ago
New Physiological Biometrics Based on Human Cognitive Factors
Modeling and quantifying different human factors continue to be one of the major challenges in introducing new biometric systems. For example, drivers of some of our behavior di...
Omar Hamdy, Issa Traore
DSD
2007
IEEE
116views Hardware» more  DSD 2007»
15 years 4 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler