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» Quantifiers and Working Memory
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IEEEPACT
2006
IEEE
15 years 4 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
ASPLOS
2010
ACM
15 years 2 months ago
An asymmetric distributed shared memory model for heterogeneous parallel systems
Heterogeneous computing combines general purpose CPUs with accelerators to efficiently execute both sequential control-intensive and data-parallel phases of applications. Existin...
Isaac Gelado, Javier Cabezas, Nacho Navarro, John ...
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 2 months ago
Use ECP, not ECC, for hard failures in resistive memories
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
Stuart E. Schechter, Gabriel H. Loh, Karin Straus,...
IWMM
2010
Springer
140views Hardware» more  IWMM 2010»
14 years 11 months ago
Parametric inference of memory requirements for garbage collected languages
The accurate prediction of program's memory requirements is a critical component in software development. Existing heap space analyses either do not take deallocation into ac...
Elvira Albert, Samir Genaim, Miguel Gómez-Z...
RTAS
2010
IEEE
14 years 8 months ago
DARTS: Techniques and Tools for Predictably Fast Memory Using Integrated Data Allocation and Real-Time Task Scheduling
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...
Sangyeol Kang, Alexander G. Dean