76 search results - page 7 / 16 » Quantifying instruction criticality for shared memory multip... |
WMPI
2004
ACM
15 years 3 months ago
2004
ACM
User-controllable coherence revives the idea of cooperation between software and hardware in an attempt to bridge the gap between efficient small-scale shared memory machines and m...
ICPP
1999
IEEE
15 years 1 months ago
1999
IEEE
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
84
Voted
ROBOCOMM
2007
IEEE
15 years 3 months ago
2007
IEEE
Abstract—Robust, dependable and concise coordination between members of a robot team is a critical ingredient of any such collective activity. Depending on the availability and t...
CAV
2008
Springer
14 years 11 months ago
2008
Springer
Hangal et. al. [3] have developed a procedure to check if an instance of the execution of a shared memory multiprocessor program, is consistent with the Total Store Order (TSO) mem...
85
Voted
DAC
2008
ACM
15 years 10 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...