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ENTCS
2007
15 years 23 days ago
2007
We describe techniques for diagnosing errors in formal equivalence checking of RTL and transistor level models of high performance microprocessors at Freescale Semiconductor Inc. ...
98
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GLVLSI
2003
IEEE
15 years 6 months ago
2003
IEEE
A critical part of the design of HW/SW systems concerns the definition of the HW/SW interface. Such interfaces do not directly map a functionality of the system description, but ...
111
Voted
ICSE
1999
IEEE-ACM
15 years 5 months ago
1999
IEEE-ACM
In this paper we show how the FLAVERS data flow analysis technique, originally formulated for programs with the rendezvous model of concurrency, can be applied to concurrent Java...
104
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FMCAD
2009
Springer
15 years 4 months ago
2009
Springer
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
116
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MTV
2003
IEEE
15 years 6 months ago
2003
IEEE
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. ...