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MEMOCODE
2007
IEEE
15 years 4 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
KI
1998
Springer
15 years 2 months ago
GOLEX - Bridging the Gap between Logic (GOLOG) and a Real Robot
The control of mobile robots acting autonomously in the real world is one of the long-term goals of the field of artificial intelligence. So far the field lacks methods bridging th...
Dirk Hähnel, Wolfram Burgard, Gerhard Lakemey...
ICCAD
1995
IEEE
113views Hardware» more  ICCAD 1995»
15 years 1 months ago
Logic decomposition during technology mapping
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
Eric Lehman, Yosinori Watanabe, Joel Grodstein, He...
LISP
2008
97views more  LISP 2008»
14 years 10 months ago
Efficient and flexible access control via Jones-optimal logic program specialisation
We describe the use of a flexible meta-interpreter for performing access control checks on deductive databases. The meta-program is implemented in Prolog and takes as input a datab...
Steve Barker, Michael Leuschel, Mauricio Varea
127
Voted
TABLEAUX
2000
Springer
15 years 1 months ago
Benchmark Analysis with FaCT
FaCT (Fast Classification of Terminologies) is a Description Logic (DL) classifier that can also be used for modal logic satisfiability testing. The FaCT system includes two reason...
Ian Horrocks