214 search results - page 17 / 43 » Quasi-Resonant Interconnects: A Low Power Design Methodology |
110
Voted
ISLPED
2003
ACM
15 years 5 months ago
2003
ACM
The Multi-Threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low Vth transistors are use...
DAC
2009
ACM
15 years 7 months ago
2009
ACM
In this work, we present a new optical routing framework, O-Router for future low-power on-chip optical interconnect integration utilizing silicon compatible nano-photonic devices...
87
Voted
ISCA
2007
IEEE
15 years 6 months ago
2007
IEEE
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
121
Voted
DAC
1999
ACM
15 years 4 months ago
1999
ACM
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
132
Voted
GLVLSI
2009
IEEE
14 years 10 months ago
2009
IEEE
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...