As computer architectures become increasingly complex, hand-tuning compiler heuristics becomes increasingly tedious and time consuming for compiler developers. This paper presents...
Matthew E. Taylor, Katherine E. Coons, Behnam Roba...
This paper describes a model for, and an implementation of, production-based synthesis of hardware description language (HDL) code in which the overall structure of the resultant ...
The traditional target machine of a parallelizing compiler can execute code sections either serially or in parallel. In contrast, targeting the generated code to a speculative para...
E cient, deeply pipelined implementations exist for a wide variety of important computation-intensive applications, and many special-purpose hardware machines have been built that...
Darren C. Cronquist, Paul Franklin, Stefan G. Berg...
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...