147 search results - page 21 / 30 » Queue Machines: Hardware Compilation in Hardware |
ISCA
2005
IEEE
15 years 3 months ago
2005
IEEE
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
90
Voted
CJ
1999
14 years 9 months ago
1999
The ability to predict the directions of branches, especially conditional branches, is an important problem in modern computer architecture and advanced compilers. Many static and...
PLDI
2003
ACM
15 years 2 months ago
2003
ACM
Empirical program optimizers estimate the values of key optimization parameters by generating different program versions and running them on the actual hardware to determine which...
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
— In this paper we investigate mapping stream programs (i.e., programs written in a streaming style for streaming architectures such as Imagine and Raw) onto a general-purpose CP...
ISCA
1999
IEEE
15 years 1 months ago
1999
IEEE
By optimizing data layout at run-time, we can potentially enhance the performance of caches by actively creating spatial locality, facilitating prefetching, and avoiding cache con...