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» Queue Machines: Hardware Compilation in Hardware
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PLDI
2011
ACM
14 years 7 days ago
Caisson: a hardware description language for secure information flow
Information flow is an important security property that must be incorporated from the ground up, including at hardware design time, to provide a formal basis for a system’s roo...
Xun Li 0001, Mohit Tiwari, Jason Oberg, Vineeth Ka...
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
15 years 3 months ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft
ICS
2005
Tsinghua U.
15 years 2 months ago
Low-power, low-complexity instruction issue using compiler assistance
In an out-of-order issue processor, instructions are dynamically reordered and issued to function units in their dataready order rather than their original program order to achiev...
Madhavi Gopal Valluri, Lizy Kurian John, Kathryn S...
CMG
2006
14 years 10 months ago
Analytic performance models for single class and multiple class multithreaded software servers
Modern computer systems are based on a wide variety of software servers, such as web servers, application servers, database servers, and mail servers. The typical software archite...
Daniel A. Menascé, Mohamed N. Bennani
HPCA
2005
IEEE
15 years 9 months ago
Software Directed Issue Queue Power Reduction
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...
Antonio González, Jaume Abella, Michael F. ...