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ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
15 years 8 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
15 years 6 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
ISCA
1998
IEEE
145views Hardware» more  ISCA 1998»
15 years 4 months ago
Multi-Level Texture Caching for 3D Graphics Hardware
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval...
Michael Cox, Narendra Bhandri, Michael Shantz
ISMB
1994
15 years 1 months ago
High Speed Pattern Matching in Genetic Data Base with Reconfigurable Hardware
Homologydetection in large data bases is probably the most time consuming operation in molecular genetic computing systems. Moreover, the progresses made all around the world conc...
Eric Lemoine, Joël Quinqueton, Jean Sallantin
ECRTS
2003
IEEE
15 years 5 months ago
Hardware-Based Solution Detecting Illegal References in Real-Time Java
The memory model used in the Real-Time Specification for Java (RTSJ) imposes strict assignment rules to or from memory areas preventing the creation of dangling pointers, and thus...
M. Teresa Higuera-Toledano