Sciweavers

5762 search results - page 114 / 1153
» R-tree: A Hardware Implementation
Sort
View
EH
2005
IEEE
158views Hardware» more  EH 2005»
15 years 5 months ago
Hardware Evolution of Analog Circuits for In-situ Robotic Fault-Recovery
We present a method for evolving and implementing artificial neural networks (ANNs) on Field Programmable Analog Arrays (FPAAs). These FPAAs offer the small size and low power usa...
Dmitry Berenson, Nicolás S. Estévez,...
FCCM
2005
IEEE
89views VLSI» more  FCCM 2005»
15 years 5 months ago
A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms
Although researchers have presented individual techniques to efficiently utilize the Peripheral Component Interconnect (PCI) bus, their contributions fail to provide a direct path...
Petersen F. Curt, James P. Durbano, Fernando E. Or...
IBPRIA
2005
Springer
15 years 5 months ago
Hardware-Accelerated Template Matching
In the last decade, consumer graphics cards have increased their power because of the computer games industry. These cards are now programmable and capable of processing huge amoun...
Raúl Cabido, Antonio S. Montemayor, Á...
ICES
2005
Springer
121views Hardware» more  ICES 2005»
15 years 5 months ago
Hardware Platforms for MEMS Gyroscope Tuning Based on Evolutionary Computation Using Open-Loop and Closed-Loop Frequency Respons
Abstract. We propose a tuning method for MEMS gyroscopes based on evolutionary computation to efficiently increase the sensitivity of MEMS gyroscopes through tuning. The tuning met...
Didier Keymeulen, Michael I. Ferguson, Wolfgang Fi...
ICCD
1993
IEEE
111views Hardware» more  ICCD 1993»
15 years 4 months ago
Ravel-XL: A Hardware Accelerator for Assigned-Delay Compiled-Code Logic Gate Simulation
Ravel-XL is a single-boardhardware accelerator for gate-level digital logic simulation. It uses a standard levelizedcode approach to statically schedule gate evaluations.However, u...
Michael A. Riepe, João P. Marques Silva, Ka...