5762 search results - page 121 / 1153 » R-tree: A Hardware Implementation |
155
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FPGA
2006
ACM
15 years 9 months ago
2006
ACM
In this paper, we propose a new internally buffered crossbar (IBC) switching architecture where the input and output distributed schedulers are embedded inside the crossbar fabric...
161
Voted
CHES
2000
Springer
15 years 9 months ago
2000
Springer
Abstract. The silicon industry has lately been focusing on side channel attacks, that is attacks that exploit information that leaks from the physical devices. Although different c...
143
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EUROGP
2000
Springer
15 years 9 months ago
2000
Springer
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
157
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CONEXT
2008
ACM
15 years 8 months ago
2008
ACM
We describe Trellis, a platform for hosting virtual networks on shared commodity hardware. Trellis allows each virtual network to define its own topology, control protocols, and f...
150
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VLSID
2005
IEEE
16 years 6 months ago
2005
IEEE
This paper presents an RTL generation scheme for a SimpleScalar / PISA Instruction set architecture with system calls to implement C programs. The scheme utilizes ASIPmeister, a p...