5762 search results - page 132 / 1153 » R-tree: A Hardware Implementation |
148
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
Abstract-- Digital designs can be mapped to different implementations using diverse approaches, with varying cost criteria. Post-processing transforms, such as transistor sizing ca...
170
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ACSD
2001
IEEE
15 years 10 months ago
2001
IEEE
Synchronous languages allow a high level, concurrent, and deterministic description the behavior of reactive systems. Thus, they can be used advantageously for the programming of ...
124
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FPL
2007
Springer
16 years 13 days ago
2007
Springer
This paper describes the mapping of a two-dimensional inverse discrete cosine transform (2-D IDCT) onto a wordlevel reconfigurable Montium R processor. This shows that the IDCT i...
136
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FPL
2007
Springer
16 years 13 days ago
2007
Springer
The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus...
143
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APCCAS
2006
IEEE
16 years 10 days ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...