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JSA
2000
90views more  JSA 2000»
14 years 11 months ago
An efficient implementation of tree-based multicast routing for distributed shared-memory multiprocessors
This paper presents an efficient routing and flow control mechanism to implement multidestination message passing in wormhole networks.It is targeted to situations where the size ...
Manuel P. Malumbres, José Duato
VLSID
2007
IEEE
231views VLSI» more  VLSID 2007»
16 years 5 days ago
AHIR: A Hardware Intermediate Representation for Hardware Generation from High-level Programs
We present AHIR, an intermediate representation (IR), that acts as a transition layer between software compilation and hardware synthesis. Such a transition layer is intended to t...
Sameer D. Sahasrabuddhe, Hakim Raja, Kavi Arya, Ma...
EH
1999
IEEE
351views Hardware» more  EH 1999»
15 years 4 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
AICCSA
2007
IEEE
89views Hardware» more  AICCSA 2007»
15 years 6 months ago
Software/Configware Implementation of Combinatorial Algorithms
This paper discusses an approach for solving combinatorial problems by combining software and dynamically reconfigurable hardware (configware). The suggested technique avoids inst...
Iouliia Skliarova, Valery Sklyarov
IJNS
2000
80views more  IJNS 2000»
14 years 11 months ago
VLSI Implementation of Neural Networks
Currently, fuzzy controllers are the most popular choice for hardware implementation of complex control surfaces because they are easy to design. Neural controllers are more compl...
Bogdan M. Wilamowski, J. Binfet, M. O. Kaynak