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ASPDAC
2000
ACM
133views Hardware» more  ASPDAC 2000»
15 years 3 months ago
A VLSI implementation of the blowfish encryption/decryption algorithm
We propose an efficient hardware architecture for the Blowfish algorithm [1]. The speed is up to 4 bit/clock, which is 9 times faster than a Pentium. By applying operator-reschedul...
Michael C.-J. Lin, Youn-Long Lin
CGF
2004
123views more  CGF 2004»
14 years 11 months ago
SIMD Optimization of Linear Expressions for Programmable Graphics Hardware
The increased programmability of graphics hardware allows efficient GPU implementations of a wide range of general computations on commodity PCs. An important factor in such imple...
Chandrajit L. Bajaj, Insung Ihm, Jungki Min, Jinsa...
EH
2003
IEEE
138views Hardware» more  EH 2003»
15 years 5 months ago
Implementing Evolution of FIR-Filters Efficiently in an FPGA
Reconfigurable hardware devices make it possible to change the topology of electronic circuits at runtime. Using reconfigurable devices as a platform for Evolvable hardware (EHW) ...
Knut Arne Vinger, Jim Torresen
ICMCS
2006
IEEE
231views Multimedia» more  ICMCS 2006»
15 years 5 months ago
Performance of Optical Flow Techniques on Graphics Hardware
Since graphics cards have become programmable the recent years, numerous computationally intensive algorithms have been implemented on the now called General Purpose Graphics Proc...
Marko Durkovic, Michael Zwick, Florian Obermeier, ...
DATE
2002
IEEE
161views Hardware» more  DATE 2002»
15 years 4 months ago
Hardware/Software Trade-Offs for Advanced 3G Channel Coding
Third generation’s wireless communications systems comprise advanced signal processing algorithms that increase the computational requirements more than ten-fold over 2G’s sys...
Heiko Michel, Alexander Worm, Norbert Wehn, Michae...