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DSD
2006
IEEE
135views Hardware» more  DSD 2006»
15 years 3 months ago
Hardware-Software Codesign of a Vector Co-processor for Public Key Cryptography
Until now, most cryptography implementations on parallel architectures have focused on adapting the software to SIMD architectures initially meant for media applications. In this ...
Jacques J. A. Fournier, Simon W. Moore
CVPR
2003
IEEE
16 years 1 months ago
Multi-Resolution Real-Time Stereo on Commodity Graphics Hardware
In this paper a stereo algorithm suitable for implementation on commodity graphics hardware is presented. This is important since it allows to free up the main processor for other...
Ruigang Yang, Marc Pollefeys
ASAP
2007
IEEE
107views Hardware» more  ASAP 2007»
15 years 6 months ago
A Hardware-Oriented Method for Evaluating Complex Polynomials
A hardware-oriented method for evaluating complex polynomials by solving iteratively a system of linear equations is proposed. Its implementation uses a digit-serial iterations on...
Milos D. Ercegovac, Jean-Michel Muller
ISIP
2008
IEEE
15 years 6 months ago
FPGA Implementation of an Adaptive Noise Canceller
This paper proposes an FPGA implementation of an Adaptive Noise Canceller using the Least Mean Square (LMS) algorithm. The hardware architecture is synthesized using the Xilinx Sp...
Tian Lan, Jinlin Zhang
FPL
2006
Springer
135views Hardware» more  FPL 2006»
15 years 3 months ago
FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems
A field-programmable gate array (FPGA) implementation of a new detection algorithm for uncoded multiple inputmultiple output (MIMO) systems based on the complex version of the sph...
Luis G. Barbero, John S. Thompson