The RISA Architecture is a novel reconfigurable hardware platform containing both hardware and software reconfigurable elements. This paper describes the architecture and the fea...
In this paper we introduce a new approach to fault simulation, using reconfigurable hardware to implement a critical path tracing algorithm. Our performance estimate shows that ou...
In this paper, we consider the problem of implementation of neural network in the context of the level 2 trigger of HESS2 project. We propose a hardware architecture which which ta...
Elliptical weighted average (EWA) surface splatting is a technique for high quality rendering of point-sampled 3D objects. EWA surface splatting renders water-tight surfaces of co...
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...