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ISLPED
1996
ACM
80views Hardware» more  ISLPED 1996»
15 years 4 months ago
Implementation of a micro power 15-bit "floating-point" A/D converter
Micro power A/D converter are required for power sensitive, battery-operated equipment such as hearing aids. This paper overviews the principles of the 15-bit 'Floating point...
L. Grisoni, Alexandre Heubi, Peter Balsiger, Faust...
ARC
2006
Springer
131views Hardware» more  ARC 2006»
15 years 3 months ago
Implementation of LPM Address Generators on FPGAs
Abstract. We propose the multiple LUT cascade as a means to configure an ninput LPM (Longest Prefix Match) address generator commonly used in routers to determine the output port g...
Hui Qin, Tsutomu Sasao, Jon T. Butler
DSD
2010
IEEE
126views Hardware» more  DSD 2010»
15 years 1 days ago
Low Power FPGA Implementations of 256-bit Luffa Hash Function
Low power techniques in a FPGA implementation of the hash function called Luffa are presented in this paper. This hash function is under consideration for adoption as standard. Tw...
Paris Kitsos, Nicolas Sklavos, Athanassios N. Skod...
AHS
2006
IEEE
93views Hardware» more  AHS 2006»
15 years 6 months ago
An FPGA Implemented Processor Architecture with Adaptive Resolution
Reconfigurable software has been applied for a long time. Reconfigurable technology also provides possibility for reconfiguring hardware but this has not been much exploited so...
Jim Torresen, Jonas Jakobsen
DATE
2006
IEEE
118views Hardware» more  DATE 2006»
15 years 6 months ago
Design and implementation of a modular and portable IEEE 754 compliant floating-point unit
Multimedia and communication algorithms from embedded system domain often make extensive use of floating-point arithmetic. Due to the complexity and expense of the floating-poin...
Kingshuk Karuri, Rainer Leupers, Gerd Ascheid, Hei...