36 search results - page 7 / 8 » RSIM: Simulating Shared-Memory Multiprocessors with ILP Proc... |
77
Voted
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
73
Voted
ICPP
2005
IEEE
15 years 3 months ago
2005
IEEE
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
CASES
2001
ACM
15 years 1 months ago
2001
ACM
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
109
click to vote
MICRO
1999
IEEE
15 years 1 months ago
1999
IEEE
Current microprocessors incorporate techniques to exploit instruction-level parallelism (ILP). However, previous work has shown that these ILP techniques are less effective in rem...
85
Voted
IPPS
2003
IEEE
15 years 2 months ago
2003
IEEE
OpenMP has emerged as a widely accepted standard for writing shared memory programs. Hardware-specific extensions such as data placement are usually needed to improve the scalabi...