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» RTOS Modeling for System Level Design
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CODES
2006
IEEE
15 years 3 months ago
Generic netlist representation for system and PE level design exploration
Designer productivity and design predictability are vital factors for successful embedded system design. Shrinking time-to-market and increasing complexity of these systems requir...
Bita Gorjiara, Mehrdad Reshadi, Pramod Chandraiah,...
BMAS
2000
IEEE
15 years 1 months ago
High-Level Design Case of a Switched-Capacitor Low-Pass Filter Using Verilog-A
System design requires experienced designers that use heuristics and built up knowledge to propose a high order solution. Behavioral models can help to formalise, optimise and spe...
Erik Lauwers, Georges G. E. Gielen, Koen Lampaert,...
DAC
2006
ACM
15 years 3 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
75
Voted
IWPC
2003
IEEE
15 years 2 months ago
Design Recovery of a Two Level System
Many applications have one or more important modules that are written in a language other than conventional procedural or object oriented languages. These languages are often tran...
Thomas R. Dean, Yuling Chen
MASCOTS
2003
14 years 10 months ago
System-Level Simulation Modeling with MLDesigner
System-level design presents special simulation modeling challenges. System-level models address the architectural and functional performance of complex systems. Systems are decom...
Gunar Schorcht, Ian A. Troxel, Keyvan Farhangian, ...