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» RTOS Modeling for System Level Design
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177
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CC
2008
Springer
240views System Software» more  CC 2008»
15 years 4 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
112
Voted
SP
1997
IEEE
106views Security Privacy» more  SP 1997»
15 years 7 months ago
Secure Software Architectures
The computer industry is increasingly dependent on open architectural standards for their competitive success. This paper describes a new approach to secure system design in which...
Mark Moriconi, Xiaolei Qian, Robert A. Riemenschne...
ETRICS
2006
15 years 6 months ago
Possibilistic Information Flow Control in MAKS and Action Refinement
Abstract. Formal methods emphasizes the need for a top-down approach when developing large reliable software systems. Refinements are map step by step abstract algebraic specificat...
Dieter Hutter
TMC
2008
110views more  TMC 2008»
15 years 2 months ago
Understanding the Impact of Interference on Collaborative Relays
Collaborative relays achieve the benefits of spatial diversity without requiring physical antenna arrays at end devices. While many studies have demonstrated its effectiveness in a...
Yan Zhu, Haitao Zheng
121
Voted
EICS
2009
ACM
15 years 7 months ago
Adapting ubicomp software and its evaluation
We describe work in progress on tools and infrastructure to support adaptive component-based software for mobile devices— in our case, Apple iPhones. Our high level aim is ‘de...
Malcolm Hall, Marek Bell, Alistair Morrison, Stuar...