1304 search results - page 25 / 261 » RTOS Modeling for System Level Design |
133
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EMSOFT
2001
Springer
15 years 6 months ago
2001
Springer
ltiple Levels of Abstractions in Embedded Software Design Jerry R. Burch1, Roberto Passerone1, and Alberto L. Sangiovanni-Vincentelli2 1 Cadence Berkeley Laboratories, Berkeley CA ...
130
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MEMOCODE
2010
IEEE
14 years 12 months ago
2010
IEEE
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
118
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ICCD
2007
IEEE
15 years 11 months ago
2007
IEEE
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...
132
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FPL
2004
Springer
15 years 7 months ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
133
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DAC
2004
ACM
15 years 7 months ago
2004
ACM
System-on-Chip (SoC) designs are increasingly becoming more complex. Efficient on-chip communication architectures are critical for achieving desired performance in these systems....