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DATE
2007
IEEE
173views Hardware» more  DATE 2007»
15 years 4 months ago
Architectural leakage-aware management of partitioned scratchpad memories
Partitioning a memory into multiple blocks that can be independently accessed is a widely used technique to reduce its dynamic power. For embedded systems, its benefits can be ev...
Olga Golubeva, Mirko Loghi, Massimo Poncino, Enric...
ICDE
2007
IEEE
155views Database» more  ICDE 2007»
15 years 4 months ago
Query-Aware Sampling for Data Streams
Data Stream Management Systems are useful when large volumes of data need to be processed in real time. Examples include monitoring network traffic, monitoring financial transacti...
Theodore Johnson, S. Muthukrishnan, Vladislav Shka...
ICPPW
2007
IEEE
15 years 4 months ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu
ISCAS
2007
IEEE
94views Hardware» more  ISCAS 2007»
15 years 4 months ago
Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M....
ISVLSI
2007
IEEE
150views VLSI» more  ISVLSI 2007»
15 years 4 months ago
Minimum-Congestion Placement for Y-interconnects: Some studies and observations
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
Tuhina Samanta, Prasun Ghosal, Hafizur Rahaman, Pa...
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