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IPPS
2006
IEEE
16 years 12 days ago
An optimal architecture for a DDC
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
Tjerk Bijlsma, Pascal T. Wolkotte, Gerard J. M. Sm...
IPPS
2006
IEEE
16 years 12 days ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
IPPS
2006
IEEE
16 years 12 days ago
WaveGrid: a scalable fast-turnaround heterogeneous peer-based desktop grid system
We propose a novel heterogeneous scalable desktop grid system, WaveGrid, which uses a peer-to-peer architecture and can satisfy the needs of applications with fastturnaround requi...
Dayi Zhou, Virginia Mary Lo
IPPS
2006
IEEE
16 years 12 days ago
Coterminous locality and coterminous group data prefetching on chip-multiprocessors
Due to shared cache contentions and interconnect delays, data prefetching is more critical in alleviating penalties from increasing memory latencies and demands on Chip-Multiproce...
Xudong Shi, Zhen Yang, Jih-Kwon Peir, Lu Peng, Yen...
VTC
2006
IEEE
16 years 12 days ago
SR-ARQ for MIMO OFDM Systems with Channel State Information Only at the Receiver
— In this paper, we compare two selective-repeat automatic-repeat-request (SR-ARQ) protocols for spatial multiplexing multiple-input multiple-output (MIMO) orthogonal frequency-d...
Chunlong Bai, Ivan J. Fair, Witold A. Krzymien