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DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 4 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
DDECS
2007
IEEE
175views Hardware» more  DDECS 2007»
15 years 4 months ago
Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair
—An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. A commonly used repair strategy is to equip memories with sp...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
DCOSS
2007
Springer
15 years 4 months ago
Distributed Coalition Formation in Visual Sensor Networks: A Virtual Vision Approach
Abstract. We propose a distributed coalition formation strategy for collaborative sensing tasks in camera sensor networks. The proposed model supports taskdependent node selection ...
Faisal Qureshi, Demetri Terzopoulos
ECTEL
2007
Springer
15 years 4 months ago
Reflections on Digital Literacy
Parallel to the societal diffusion of digital technologies, the debate on their impacts and requirements has created terms like ICT literacy, digital literacy or digital competenc...
Harald Gapski
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
15 years 4 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...