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MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
15 years 11 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
IISWC
2008
IEEE
15 years 10 months ago
Evaluating the impact of dynamic binary translation systems on hardware cache performance
Dynamic binary translation systems enable a wide range of applications such as program instrumentation, optimization, and security. DBTs use a software code cache to store previou...
Arkaitz Ruiz-Alvarez, Kim M. Hazelwood
IWNAS
2008
IEEE
15 years 10 months ago
POND: The Power of Zone Overlapping in DHT Networks
— Distributed Hash Table (DHT) based algorithms have been proposed to solve the routing issues in large-scale Peer-to-Peer (P2P) applications. DHT systems create an elegant Peer-...
Zhiyong Xu, Jizhong Han, Laxmi N. Bhuyan
SIPS
2008
IEEE
15 years 10 months ago
Unified decoder architecture for LDPC/turbo codes
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon li...
Yang Sun, Joseph R. Cavallaro
AMFG
2007
IEEE
327views Biometrics» more  AMFG 2007»
15 years 10 months ago
Model-Assisted 3D Face Reconstruction from Video
Abstract. This paper describes a model-assisted system for reconstruction of 3D faces from a single consumer quality camera using a structure from motion approach. Typical multi-vi...
Douglas Fidaleo, Gérard G. Medioni
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