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» Rapid Embedded Hardware Software System Generation
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DATE
2007
IEEE
95views Hardware» more  DATE 2007»
15 years 9 months ago
Memory bank aware dynamic loop scheduling
In a parallel system with multiple CPUs, one of the key problems is to assign loop iterations to processors. This problem, known as the loop scheduling problem, has been studied i...
Mahmut T. Kandemir, Taylan Yemliha, Seung Woo Son,...
170
Voted
INFSOF
2006
151views more  INFSOF 2006»
15 years 3 months ago
Prioritized interaction testing for pair-wise coverage with seeding and constraints
Interaction testing is widely used in screening for faults. In software testing, it provides a natural mechanism for testing systems to be deployed on a variety of hardware and so...
Renée C. Bryce, Charles J. Colbourn
PASTE
2010
ACM
15 years 8 months ago
Opportunities for concurrent dynamic analysis with explicit inter-core communication
Multicore is now the dominant processor trend, and the number of cores is rapidly increasing. The paradigm shift to multicore forces the redesign of the software stack, which incl...
Jungwoo Ha, Stephen P. Crago
MICRO
2008
IEEE
126views Hardware» more  MICRO 2008»
15 years 3 months ago
Multicore Resource Management
UAL PRIVATE MACHINE ABSTRACTION WOULD ALLOW SOFTWARE POLICIES TO EXPLICITLY MANAGE MICROARCHITECTURE RESOURCES. VPM POLICIES, IMPLEMENTED PRIMARILY IN SOFTWARE, TRANSLATE APPLICATI...
Kyle J. Nesbit, Miquel Moretó, Francisco J....
ANCS
2007
ACM
15 years 7 months ago
Compiling PCRE to FPGA for accelerating SNORT IDS
Deep Payload Inspection systems like SNORT and BRO utilize regular expression for their rules due to their high expressibility and compactness. The SNORT IDS system uses the PCRE ...
Abhishek Mitra, Walid A. Najjar, Laxmi N. Bhuyan