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108
Voted
DATE
2003
IEEE
135views Hardware» more  DATE 2003»
15 years 8 months ago
Estimation of Bus Performance for a Tuplespace in an Embedded Architecture
This paper describes a design methodology for the estimation of bus performance of a tuplespace for factory automation. The need of a tuplespace is motivated by the characteristic...
Nicola Drago, Franco Fummi, Marco Monguzzi, Giovan...
142
Voted
RTAS
2000
IEEE
15 years 7 months ago
An Approach for Supporting Temporal Partitioning and Software Reuse in Integrated Modular Avionics
The Integrated Modular Avionics (IMA) approach can achieve lower overall hardware costs and reduced level of spares by getting multiple applications that have traditionally been i...
Mohamed F. Younis, Mohamed Aboutabl, Daeyoung Kim
119
Voted
MTDT
2003
IEEE
105views Hardware» more  MTDT 2003»
15 years 8 months ago
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu L...
140
Voted
ICPP
2002
IEEE
15 years 8 months ago
Software Caching using Dynamic Binary Rewriting for Embedded Devices
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...
Chad Huneycutt, Joshua B. Fryman, Kenneth M. Macke...
128
Voted
DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 7 months ago
Hardware Synthesis from C/C++ Models
Software programming languages, such as C/C++, have been used as means for specifying hardware for quite a while. Different design methodologies have exploited the advantages of f...
Giovanni De Micheli