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» Rapid Resource-Constrained Hardware Performance Estimation
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CODES
2005
IEEE
15 years 3 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
IJCV
2010
261views more  IJCV 2010»
14 years 8 months ago
HumanEva: Synchronized Video and Motion Capture Dataset and Baseline Algorithm for Evaluation of Articulated Human Motion
While research on articulated human motion and pose estimation has progressed rapidly in the last few years, there has been no systematic quantitative evaluation of competing meth...
Leonid Sigal, Alexandru O. Balan, Michael J. Black
PPOPP
2011
ACM
14 years 9 days ago
ScalaExtrap: trace-based communication extrapolation for spmd programs
Performance modeling for scientific applications is important for assessing potential application performance and systems procurement in high-performance computing (HPC). Recent ...
Xing Wu, Frank Mueller
ICCV
2011
IEEE
13 years 9 months ago
DTAM: Dense Tracking and Mapping in Real-Time
DTAM is a system for real-time camera tracking and reconstruction which relies not on feature extraction but dense, every pixel methods. As a single hand-held RGB camera flies ov...
Richard A. Newcombe, Steven Lovegrove, Andrew J. D...
SIGCOMM
2009
ACM
15 years 4 months ago
Cross-layer wireless bit rate adaptation
This paper presents SoftRate, a wireless bit rate adaptation protocol that is responsive to rapidly varying channel conditions. Unlike previous work that uses either frame recepti...
Mythili Vutukuru, Hari Balakrishnan, Kyle Jamieson