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CJ
2006
84views more  CJ 2006»
14 years 9 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
CORR
2008
Springer
98views Education» more  CORR 2008»
14 years 9 months ago
Information Acquisition and Exploitation in Multichannel Wireless Networks
A wireless system with multiple channels is considered, where each channel has several transmission states. A user learns about the instantaneous state of an available channel by ...
Sudipto Guha, Kamesh Munagala, Saswati Sarkar
83
Voted
MOBICOM
2009
ACM
15 years 4 months ago
Data fusion improves the coverage of wireless sensor networks
Wireless sensor networks (WSNs) have been increasingly available for critical applications such as security surveillance and environmental monitoring. An important performance mea...
Guoliang Xing, Rui Tan, Benyuan Liu, Jianping Wang...
HPDC
2000
IEEE
15 years 1 months ago
QoS and Contention-Aware Multi-Resource Reservation
To provide Quality of Service (QoS) guarantee in distributed services, it is necessary to reserve multiple computing and communication resources for each service session. Meanwhile...
Dongyan Xu, Klara Nahrstedt, Arun Viswanathan, Dua...
89
Voted
ASPLOS
2011
ACM
14 years 1 months ago
Blink: managing server clusters on intermittent power
Reducing the energy footprint of data centers continues to receive significant attention due to both its financial and environmental impact. There are numerous methods that limi...
Navin Sharma, Sean Barker, David Irwin, Prashant J...