39 search results - page 8 / 8 » Re-mapping for low power under tight timing constraints |
VLSID
2008
IEEE
14 years 6 months ago
2008
IEEE
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
ISLPED
2009
ACM
13 years 11 months ago
2009
ACM
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
MICRO
2009
IEEE
14 years 27 days ago
2009
IEEE
The phase-change random access memory (PRAM) technology is fast maturing to production levels. Main advantages of PRAM are non-volatility, byte addressability, in-place programmab...
ASAP
2005
IEEE
13 years 12 months ago
2005
IEEE
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...