43 search results - page 7 / 9 » Reader-Writer Synchronization for Shared-Memory Multiprocess... |
DATE
2004
IEEE
15 years 1 months ago
2004
IEEE
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
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CODES
2002
IEEE
15 years 2 months ago
2002
IEEE
The aggressive evolution of the semiconductor industry — smaller process geometries, higher densities, and greater chip complexity — has provided design engineers the means to...
ISCA
1998
IEEE
15 years 1 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
SIGMETRICS
2010
ACM
15 years 2 months ago
2010
ACM
We present S, the first system to provide transparent, lowoverhead application record-replay and the ability to go live from replayed execution. S i...
HIPC
2005
Springer
15 years 2 months ago
2005
Springer
Abstract. The proliferation of multiprocessor servers and multithreaded applications has increased the demand for high-performance synchronization. Traditional scheduler-based lock...