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» Reconfigurable Architectures: A New Vision for Optimization ...
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JETAI
2007
131views more  JETAI 2007»
14 years 9 months ago
A computational architecture for heterogeneous reasoning
Reasoning, problem solving, indeed the general process of acquiring knowledge, is not an isolated, homogenous affair involving a one agent using a single form of representation, b...
Dave Barker-Plummer, John Etchemendy
FPGA
2004
ACM
128views FPGA» more  FPGA 2004»
15 years 1 months ago
Incremental physical resynthesis for timing optimization
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi...
CODES
2006
IEEE
15 years 3 months ago
Retargetable code optimization with SIMD instructions
Retargetable C compilers are nowadays widely used to quickly obtain compiler support for new embedded processors and to perform early processor architecture exploration. One frequ...
Manuel Hohenauer, Christoph Schumacher, Rainer Leu...
AINA
2009
IEEE
15 years 4 months ago
Evaluation and Optimization of the Registrar Redundancy Handling in Reliable Server Pooling Systems
Abstract—The Reliable Server Pooling (RSerPool) architecture is the IETF’s new standard for a lightweight server redundancy and session failover framework to support availabili...
Xing Zhou, Thomas Dreibholz, Fu Fa, Wencai Du, Erw...
DAC
1995
ACM
15 years 1 months ago
Hierarchical Optimization of Asynchronous Circuits
Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
Bill Lin, Gjalt G. de Jong, Tilman Kolks