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DATE
2010
IEEE
140views Hardware» more  DATE 2010»
15 years 2 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...
IEEESCC
2007
IEEE
15 years 4 months ago
A Fault-Tolerant Middleware Architecture for High-Availability Storage Services
Today organizations and business enterprises of all sizes need to deal with unprecedented amounts of digital information, creating challenging demands for mass storage and on-dema...
Sangeetha Seshadri, Ling Liu, Brian F. Cooper, Law...
EUROPAR
1999
Springer
15 years 2 months ago
An Evaluation of High Performance Fortran Compilers Using the HPFBench Benchmark Suite
Abstract. The High Performance Fortran (HPF) benchmark suite HPFBench was designed for evaluating the HPF language and compilers on scalable architectures. The functionality of the...
Guohua Jin, Y. Charlie Hu
IDMS
1999
Springer
117views Multimedia» more  IDMS 1999»
15 years 2 months ago
Tailoring Protocols for Dynamic Network Conditions and User Requirements
This paper shows the use of protocols dynamically generated for a particular network environment and an application’s requirements. We have developed a novel system called PNUT (...
R. De Silva, Aruna Seneviratne
87
Voted
IWCMC
2006
ACM
15 years 4 months ago
Low complexity design of space-time convolutional codes with high spectral efficiencies
Space time convolutional codes (STCCs) are an effective way to combine transmit diversity with coding. The computational complexity of designing STCCs generally increases exponent...
Kyungmin Kim, Hamid R. Sadjadpour, Rick S. Blum, Y...