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DAC
2007
ACM
16 years 3 months ago
Enhancing FPGA Performance for Arithmetic Circuits
FPGAs offer flexibility and cost-effectiveness that ASICs cannot match; however, their performance is quite poor in comparison, especially for arithmetic dominated circuits. To ad...
Philip Brisk, Ajay K. Verma, Paolo Ienne, Hadi Par...
VLSID
2002
IEEE
126views VLSI» more  VLSID 2002»
16 years 3 months ago
A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication
With the projected significant growth in mobile internet and multimedia services, there is a strong demand for nextgeneration appliances capable of wireless image communication. O...
Debashis Panigrahi, Clark N. Taylor, Sujit Dey
CCGRID
2003
IEEE
15 years 8 months ago
Recovering Internet Symmetry in Distributed Computing
This paper describes two systems to recover the Internet connectivity impaired by private networks and firewalls. These devices cause asymmetry in the Internet, making peer-to-pee...
Se-Chang Son, Miron Livny
IPPS
2010
IEEE
15 years 22 days ago
BlobSeer: Bringing high throughput under heavy concurrency to Hadoop Map-Reduce applications
Hadoop is a software framework supporting the Map/Reduce programming model. It relies on the Hadoop Distributed File System (HDFS) as its primary storage system. The efficiency of ...
Bogdan Nicolae, Diana Moise, Gabriel Antoniu, Luc ...
ERSA
2010
153views Hardware» more  ERSA 2010»
15 years 6 days ago
VAPRES: A Customizable and Flexible Base Architecture for Partially Reconfigurable Systems
- Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requiremen...
Ann Gordon-Ross, Abelardo Jara-Berrocal