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ARC
2010
Springer
186views Hardware» more  ARC 2010»
13 years 9 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
DATE
2005
IEEE
180views Hardware» more  DATE 2005»
13 years 12 months ago
A Coprocessor for Accelerating Visual Information Processing
Visual information processing will play an increasingly important role in future electronics systems. In many applications, e.g. video surveillance cameras, data throughput of mic...
Walter Stechele, L. Alvado Cárcel, Stephan ...
CORR
2010
Springer
162views Education» more  CORR 2010»
13 years 6 months ago
Multi-standard programmable baseband modulator for next generation wireless communication
Considerable research has taken place in recent times in the area of parameterization of software defined radio (SDR) architecture. Parameterization decreases the size of the soft...
Indranil Hatai, Indrajit Chakrabarti
DATE
2009
IEEE
137views Hardware» more  DATE 2009»
14 years 1 months ago
A self-adaptive system architecture to address transistor aging
—As semiconductor manufacturing enters advanced nanometer design paradigm, aging and device wear-out related degradation is becoming a major concern. Negative Bias Temperature In...
Omer Khan, Sandip Kundu
ISCAS
2007
IEEE
84views Hardware» more  ISCAS 2007»
14 years 19 days ago
High Speed 1-bit Bypass Adder Design for Low Precision Additions
—In this paper, we propose a high speed adder which is adopted for our reconfigurable architecture called FleXilicon. To support sub-word parallelism, the FleXilicon architecture...
Jong-Suk Lee, Dong Sam Ha