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IPPS
2006
IEEE
15 years 4 months ago
Exploiting processing locality through paging configurations in multitasked reconfigurable systems
FPGA chips in reconfigurable computer systems are used as malleable coprocessors where components of a hardware library of functions can be configured as needed. As the number of ...
T. Taher, Tarek A. El-Ghazawi
ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
15 years 3 months ago
Reconfigurable Fast Memory Management System Design for Application Specific Processors
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...
S. Kagan Agun, J. Morris Chang
FPL
2003
Springer
120views Hardware» more  FPL 2003»
15 years 3 months ago
Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...
DAC
2003
ACM
15 years 11 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
DATE
2003
IEEE
106views Hardware» more  DATE 2003»
15 years 3 months ago
Reconfigurable Signal Processing in Wireless Terminals
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
Jürgen Helmschmidt, Eberhard Schüler, Pr...