444 search results - page 47 / 89 » Reconfigurable Hardware for Power-over-Fiber Applications |
DAC
2000
ACM
15 years 11 months ago
2000
ACM
In this paper we describe a new hardware/software partitioning approach for embedded reconfigurable architectures consisting of a general-purpose processor (CPU), a dynamically re...
ANCS
2010
ACM
14 years 8 months ago
2010
ACM
Software packet processing is becoming more important to enable differentiated and rapidly-evolving network services. With increasing numbers of programmable processor and acceler...
CODES
2006
IEEE
15 years 1 months ago
2006
IEEE
This paper presents a hw/sw codesign methodology based on BORPH, an operating system designed for FPGA-based reconfigurable computers (RC's). By providing native kernel suppo...
ASAP
2007
IEEE
15 years 2 months ago
2007
IEEE
We present a design of a customized crossbar scheduler for on-chip networks. The proposed scheduler arbitrates on-demand interconnects, where physical topologies are identical to ...
ERSA
2007
14 years 11 months ago
2007
”C to Gates” compilers for FPGAs have been a topic of investigation for nearly two decades. Some of these endeavors have reached a point of viability. Impulse C, for example, ...